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    74LVC1G08
    74LVC1G08GW,125
    Single 2-input AND gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Direct interface with TTL levels

    • Overvoltage tolerant inputs to 5.5 V

    • IOFF circuitry provides partial Power-down mode operation

    • Latch-up performance ≤ 250 mA

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from −40 °C to +85 °C and −40 °C to +125 °C

    1+:¥1.6805

    100+:¥0.7021

    300+:¥0.7021

    3000+:¥0.1228

    300,000
    数据手册

    限量供应

    74HC595
    74HC595PW,118
    8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
    • Wide supply voltage range from 2.0 V to 6.0 V
    • CMOS low power dissipation
    • High noise immunity
    • 8-bit serial input

    • 8-bit serial or parallel output

    • Storage register with 3-state outputs

    • Shift register with direct clear

    • 100 MHz (typical) shift out frequency

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
    • Complies with JEDEC standards:
      • JESD8C (2.7 V to 3.6 V)
      • JESD7A (2.0 V to 6.0 V)
    • Input levels:

      • For 74HC595: CMOS level

      • For 74HCT595: TTL level

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥2.3170

    100+:¥1.3424

    300+:¥1.3424

    2480+:¥0.3113

    67,500
    数据手册
    74LV74
    74LV74PW,118
    Dual D-type flip-flop with set and reset; positive-edge trigger
    • Wide supply voltage range from 1.0 V to 5.5 V

    • Optimized for low voltage applications from 1.0 V to 3.6 V

    • CMOS low power dissipation

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Direct interface with TTL levels (2.7 V to 3.6 V)

    • ESD protection:
      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥2.1992

    100+:¥1.6440

    300+:¥1.2914

    52,500
    数据手册
    HEF4050B
    HEF4050BT,653
    Hex non-inverting buffers
    • Accepts input voltages in excess of the supply voltage

    • Fully static operation

    • 5 V, 10 V, and 15 V parametric ratings

    • Standardized symmetrical output characteristics

    • Specified from -40 °C to +85 °C

    • Complies with JEDEC standard JESD 13-B

    1+:¥2.7130

    100+:¥2.0247

    300+:¥1.5909

    47,500
    数据手册
    74LVC2G14
    74LVC2G14GW,125
    Dual inverting Schmitt trigger with 5 V tolerant input
    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Direct interface with TTL levels

    • Unlimited rise and fall times

    • Overvoltage tolerant inputs to 5.5 V

    • IOFF circuitry provides partial Power-down mode operation

    • Latch-up performance exceeds 250 mA

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C.

    1+:¥2.0087

    100+:¥1.1336

    300+:¥1.1336

    21,000
    数据手册

    限量供应

    74LVC2G86
    74LVC2G86GT,115
    Dual 2-input EXCLUSIVE-OR gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low-power dissipation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation
    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥2.4046

    100+:¥2.2901

    300+:¥2.1810

    5000+:¥0.4555

    15,000
    数据手册
    74HC1G126
    74HCT1G126GV,125
    Bus buffer/line driver; 3-state
    • Wide supply voltage range from 2.0 V to 6.0 V

    • CMOS low power dissipation

    • Symmetrical output impedance

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Balanced propagation delays

    • Input levels:

      • For 74HC1G126: CMOS level

      • For 74HCT1G126: TTL level

    • Complies with JEDEC standards:
      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Specified from -40° C to +85° C and -40° C to +125° C

    1+:¥1.9932

    100+:¥1.1297

    300+:¥0.7481

    0
    数据手册
    74AVCH1T45
    74AVCH1T45GW,125
    Dual-supply voltage level translator/transceiver; 3-state
    • Wide supply voltage range from 0.8 V to 3.6 V

    • High noise immunity

    • CMOS low power dissipation

    • Overvoltage tolerant inputs to 3.6 V

    • Dynamically controlled outpus

    • Complies with JEDEC standards:

      • JESD8-12 (0.8 V to 1.3 V)

      • JESD8-11 (0.9 V to 1.65 V)

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

    • ESD protection:

      • HBM JESD22-A114E Class 3B exceeds 8000 V

      • MM JESD22-A115-A exceeds 200 V

      • CDM JESD22-C101C exceeds 1000 V

    • Maximum data rates:

      • 500 Mbit/s (1.8 V to 3.3 V translation)

      • 320 Mbit/s (< 1.8 V to 3.3 V translation)

      • 320 Mbit/s (translate to 2.5 V or 1.8 V)

      • 280 Mbit/s (translate to 1.5 V)

      • 240 Mbit/s (translate to 1.2 V)

    • Suspend mode

    • Bus hold on data inputs

    • Latch-up performance exceeds 100 mA per JESD 78 Class II

    • Low noise overshoot and undershoot < 10 % of VCC

    • IOFF circuitry provides partial Power-down mode operation

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.9888

    100+:¥1.6010

    300+:¥1.4220

    14,800
    数据手册

    限量供应

    74LVC8T245
    74LVC8T245PW,118
    8-bit dual supply translating transceiver; 3-state
    • Wide supply voltage range:

      • VCC(A): 1.2 V to 5.5 V

      • VCC(B): 1.2 V to 5.5 V

    • High noise immunity

    • Complies with JEDEC standards:

      • JESD8-7 (1.2 V to 1.95 V)

      • JESD8-5 (1.8 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • Maximum data rates:

      • 420 Mbps (3.3 V to 5.0 V translation)

      • 210 Mbps (translate to 3.3 V)

      • 140 Mbps (translate to 2.5 V)

      • 75 Mbps (translate to 1.8 V)

      • 60 Mbps (translate to 1.5 V)

    • Suspend mode

    • Latch-up performance exceeds 100 mA per JESD 78B Class II

    • ±24 mA output drive (VCC = 3.0 V)

    • Inputs accept voltages up to 5.5 V

    • Low power consumption: 30 μA maximum ICC

    • IOFF circuitry provides partial Power-down mode operation

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥6.6043

    100+:¥5.3215

    300+:¥4.4664

    2500+:¥1.3620

    12,500
    数据手册

    限量供应

    74HC4094
    74HC4094PW,118
    8-stage shift-and-store bus register
    • Complies with JEDEC standard JESD7A

    • Input levels:

      • For 74HC4094: CMOS level

      • For 74HCT4094: TTL level

    • Low-power dissipation

    • ESD protection:

      • HBM JESD22-A114F exceeds 2 kV

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥2.5372

    100+:¥1.9207

    300+:¥1.5925

    2500+:¥0.4667

    12,500
    数据手册

    限量供应

    74HC165
    74HC165PW,118
    8-bit parallel-in/serial out shift register
    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Asynchronous 8-bit parallel load

    • Synchronous serial input

    • Input levels:

      • For 74HC165: CMOS level

      • For 74HCT165: TTL level

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥2.2588

    100+:¥1.7119

    300+:¥1.4036

    2500+:¥0.4436

    12,500
    数据手册

    限量供应

    74AVC4TD245
    74AVC4TD245BQ,115
    4-bit dual supply translating transceiver with configurable voltage translation; 3-state
    • Wide supply voltage range:

      • VCC(A): 0.8 V to 3.6 V

      • VCC(B): 0.8 V to 3.6 V

    • Complies with JEDEC standards:

      • JESD8-12 (0.8 V to 1.3 V)

      • JESD8-11 (0.9 V to 1.65 V)

      • JESD8-7 (1.2 V to 1.95 V)

      • JESD8-5 (1.8 V to 2.7 V)

      • JESD8-B (2.7 V to 3.6 V)

    • Maximum data rates:

      • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)

      • 200 Mbit/s (≥ 1.1 V to 3.3 V translation)

      • 200 Mbit/s (≥ 1.1 V to 2.5 V translation)

      • 200 Mbit/s (≥ 1.1 V to 1.8 V translation)

      • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)

      • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)

    • Suspend mode

    • Latch-up performance exceeds 100 mA per JESD 78 Class II

    • Inputs accept voltages up to 3.6 V

    • IOFF circuitry provides partial Power-down mode operation

    • ESD protection:

      • HBM JESD22-A114E Class 3B exceeds 8000 V

      • MM JESD22-A115-A exceeds 200 V

      • CDM JESD22-C101C exceeds 1000 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥4.8144

    100+:¥3.7802

    300+:¥3.3228

    3000+:¥0.9360

    12,000
    数据手册

    限量供应

    74LVT245
    74LVT245D,118
    3.3 V octal transceiver with direction pin; 3-state
    • Wide supply voltage range from 2.7 to 3.6 V

    • 3-state buffers

    • Octal bidirectional bus interface

    • Overvoltage tolerant inputs to 5.5 V

    • Direct interface with TTL levels

    • BiCMOS high speed and output drive

    • Output capability: +64 mA/-32 mA

    • Latch-up protection exceeds 500 mA per JESD78 class II level A

    • Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs

    • No bus current loading when output is tied to 5 V bus

    • Live insertion/extraction permitted

    • Power-up 3-state

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standards JESD8C (2.7 V to 3.6 V)

    • ESD protection:

      • HBM JESD22-A114E exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to 85 °C

    1+:¥4.6553

    100+:¥3.5813

    300+:¥2.9847

    2000+:¥0.7694

    10,000
    数据手册

    限量供应

    74LVC2G86
    74LVC2G86GXX
    Dual 2-input EXCLUSIVE-OR gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low-power dissipation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation
    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥3.3114

    100+:¥2.4959

    300+:¥2.4959

    10000+:¥0.4715

    10,000
    数据手册

    限量供应

    74LVC2G38
    74LVC2G38GXX
    Dual 2-input NAND gate; open drain
    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • ±24 mA output drive (VCC = 3.0 V)

    • Open-drain outputs

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥3.3909

    100+:¥2.5656

    300+:¥2.5656

    10000+:¥0.4715

    10,000
    数据手册

    限量供应

    74LVC2G32
    74LVC2G32GXX
    Dual 2-input OR gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • 5 V tolerant outputs in the Power-down mode

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.6516

    100+:¥1.1125

    300+:¥1.1125

    10000+:¥0.4715

    10,000
    数据手册

    限量供应

    74LVC2G08
    74LVC2G08GXX
    Dual 2-input AND gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • Overvoltage tolerant inputs to 5.5 V

    • IOFF circuitry provides partial Power-down mode operation

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥2.1305

    100+:¥1.2602

    300+:¥1.0648

    10000+:¥0.3506

    10,000
    数据手册

    限量供应

    74LVC2G00
    74LVC2G00GXX
    Dual 2-input NAND gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Overvoltage tolerant inputs to 5.5 V

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.8303

    100+:¥1.3771

    300+:¥1.3771

    10000+:¥0.4715

    10,000
    数据手册

    限量供应

    74LVC1GU04
    74LVC1GU04GX,125
    Unbuffered inverter
    • Overvoltage tolerant inputs to 5.5 V
    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • Complies with JEDEC standard no. 8-1A

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options
    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.7203

    100+:¥0.8810

    300+:¥0.8809

    10000+:¥0.2894

    10,000
    数据手册

    限量供应

    74LVC1G86
    74LVC1G86GX,125
    2-input EXCLUSIVE-OR gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • Overvoltage tolerant inputs to 5.5 V

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • IOFF circuitry provides partial Power-down mode operation

    • Direct interface with TTL levels

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.1315

    100+:¥0.7398

    300+:¥0.6745

    10000+:¥0.2894

    10,000
    数据手册