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    HEF4050B
    HEF4050BT,653
    Hex non-inverting buffers
    • Accepts input voltages in excess of the supply voltage

    • Fully static operation

    • 5 V, 10 V, and 15 V parametric ratings

    • Standardized symmetrical output characteristics

    • Specified from -40 °C to +85 °C

    • Complies with JEDEC standard JESD 13-B

    1+:¥2.7130

    100+:¥2.0247

    300+:¥1.5909

    47,500
    数据手册
    74AVC4TD245
    74AVC4TD245BQ,115
    4-bit dual supply translating transceiver with configurable voltage translation; 3-state
    • Wide supply voltage range:

      • VCC(A): 0.8 V to 3.6 V

      • VCC(B): 0.8 V to 3.6 V

    • Complies with JEDEC standards:

      • JESD8-12 (0.8 V to 1.3 V)

      • JESD8-11 (0.9 V to 1.65 V)

      • JESD8-7 (1.2 V to 1.95 V)

      • JESD8-5 (1.8 V to 2.7 V)

      • JESD8-B (2.7 V to 3.6 V)

    • Maximum data rates:

      • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)

      • 200 Mbit/s (≥ 1.1 V to 3.3 V translation)

      • 200 Mbit/s (≥ 1.1 V to 2.5 V translation)

      • 200 Mbit/s (≥ 1.1 V to 1.8 V translation)

      • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)

      • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)

    • Suspend mode

    • Latch-up performance exceeds 100 mA per JESD 78 Class II

    • Inputs accept voltages up to 3.6 V

    • IOFF circuitry provides partial Power-down mode operation

    • ESD protection:

      • HBM JESD22-A114E Class 3B exceeds 8000 V

      • MM JESD22-A115-A exceeds 200 V

      • CDM JESD22-C101C exceeds 1000 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥4.8144

    100+:¥3.7802

    300+:¥3.3228

    18,000
    数据手册
    74LVC8T245
    74LVC8T245PW,118
    8-bit dual supply translating transceiver; 3-state
    • Wide supply voltage range:

      • VCC(A): 1.2 V to 5.5 V

      • VCC(B): 1.2 V to 5.5 V

    • High noise immunity

    • Complies with JEDEC standards:

      • JESD8-7 (1.2 V to 1.95 V)

      • JESD8-5 (1.8 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • Maximum data rates:

      • 420 Mbps (3.3 V to 5.0 V translation)

      • 210 Mbps (translate to 3.3 V)

      • 140 Mbps (translate to 2.5 V)

      • 75 Mbps (translate to 1.8 V)

      • 60 Mbps (translate to 1.5 V)

    • Suspend mode

    • Latch-up performance exceeds 100 mA per JESD 78B Class II

    • ±24 mA output drive (VCC = 3.0 V)

    • Inputs accept voltages up to 5.5 V

    • Low power consumption: 30 μA maximum ICC

    • IOFF circuitry provides partial Power-down mode operation

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥6.6043

    100+:¥5.3215

    300+:¥4.4664

    15,000
    数据手册
    74LVC2G86
    74LVC2G86GT,115
    Dual 2-input EXCLUSIVE-OR gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low-power dissipation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation
    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥2.4046

    100+:¥2.2901

    300+:¥2.1810

    15,000
    数据手册
    74HC4094
    74HC4094PW,118
    8-stage shift-and-store bus register
    • Complies with JEDEC standard JESD7A

    • Input levels:

      • For 74HC4094: CMOS level

      • For 74HCT4094: TTL level

    • Low-power dissipation

    • ESD protection:

      • HBM JESD22-A114F exceeds 2 kV

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥2.5372

    100+:¥1.9207

    300+:¥1.5925

    15,000
    数据手册
    74HC165
    74HC165PW,118
    8-bit parallel-in/serial out shift register
    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Asynchronous 8-bit parallel load

    • Synchronous serial input

    • Input levels:

      • For 74HC165: CMOS level

      • For 74HCT165: TTL level

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥2.2588

    100+:¥1.7119

    300+:¥1.4036

    15,000
    数据手册
    74LVT245
    74LVT245D,118
    3.3 V octal transceiver with direction pin; 3-state
    • Wide supply voltage range from 2.7 to 3.6 V

    • 3-state buffers

    • Octal bidirectional bus interface

    • Overvoltage tolerant inputs to 5.5 V

    • Direct interface with TTL levels

    • BiCMOS high speed and output drive

    • Output capability: +64 mA/-32 mA

    • Latch-up protection exceeds 500 mA per JESD78 class II level A

    • Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs

    • No bus current loading when output is tied to 5 V bus

    • Live insertion/extraction permitted

    • Power-up 3-state

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standards JESD8C (2.7 V to 3.6 V)

    • ESD protection:

      • HBM JESD22-A114E exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to 85 °C

    1+:¥4.6553

    100+:¥3.5813

    300+:¥2.9847

    12,000
    数据手册
    74LVC1G34
    74LVC1G34GW,125
    Single buffer
    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • IOFF circuitry provides partial Power-down mode operation

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.7616

    100+:¥0.9561

    300+:¥0.9561

    12,000
    数据手册
    74ALVC164245
    74ALVC164245DGG:11
    16-bit dual supply translating transceiver; 3-state
    • Wide supply voltage range:

      • 3 V port (VCC(A)): 1.5 V to 3.6 V

      • 5 V port (VCC(B)): 1.5 V to 5.5 V

    • CMOS low power consumption

    • Overvoltage tolerant inputs to 5.5 V

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Control inputs voltage range from 2.7 V to 5.5 V

    • High-impedance outputs when VCC(A) or VCC(B) = 0 V

    • Complies with JEDEC standards:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥6.3657

    100+:¥4.8741

    300+:¥4.2973

    12,000
    数据手册
    NCA9306
    NCA9306DCH
    2-bit bidirectional multi-voltage level translator; open-drain; push-pull
    • 2-channel bidirectional voltage translator for SDA and SCL lines in mixed mode I²C bus applications

    • Open-drain I²C-bus I/O ports (SCLA, SDAA, SCLB and SDAB)

    • Provides bidirectional voltage translation with no direction pin

    • High-impedance SCLA, SDAA, SCLB and SDAB for EN = LOW

    • Up translation

      • < 100 MHz; CL = 30 pF

      • < 40 MHz; CL = 50 pF

    • Down translation

      • > 100 MHz; CL = 30 pF

      • < 40 MHz; CL = 50 pF

    • Hot insertion

    • Bidirectional voltage level translation between:

      • 0.95 V and 1.8 V, 2.5 V, 3.3 V and 5.0 V

      • 1.2 V and 1.8 V, 2.5 V, 3.3 V and 5.0 V

      • 1.8 V and 2.5 V, 3.3 V and 5.0 V

      • 2.5 V and 3.3 V and 5.0 V

      • 3.3 V and 5.0 V

    • Low standby current

    • 5 V tolerant I²C-bus I/O pins to support mixed mode signal operation

    • Low RON provides less signal distortion

    • Latch-up performance exceeds 100 mA per JESD78 class II level A

    • ESD protection:

      • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2000 V

      • CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 1000 V

    • Specified from -40 °C to +125 °C

    1+:¥3.1736

    100+:¥2.4577

    300+:¥2.1593

    11,990
    数据手册
    NCA9306
    NCA9306GXX
    2-bit bidirectional multi-voltage level translator; open-drain; push-pull
    • 2-channel bidirectional voltage translator for SDA and SCL lines in mixed mode I²C bus applications

    • Open-drain I²C-bus I/O ports (SCLA, SDAA, SCLB and SDAB)

    • Provides bidirectional voltage translation with no direction pin

    • High-impedance SCLA, SDAA, SCLB and SDAB for EN = LOW

    • Up translation

      • < 100 MHz; CL = 30 pF

      • < 40 MHz; CL = 50 pF

    • Down translation

      • > 100 MHz; CL = 30 pF

      • < 40 MHz; CL = 50 pF

    • Hot insertion

    • Bidirectional voltage level translation between:

      • 0.95 V and 1.8 V, 2.5 V, 3.3 V and 5.0 V

      • 1.2 V and 1.8 V, 2.5 V, 3.3 V and 5.0 V

      • 1.8 V and 2.5 V, 3.3 V and 5.0 V

      • 2.5 V and 3.3 V and 5.0 V

      • 3.3 V and 5.0 V

    • Low standby current

    • 5 V tolerant I²C-bus I/O pins to support mixed mode signal operation

    • Low RON provides less signal distortion

    • Latch-up performance exceeds 100 mA per JESD78 class II level A

    • ESD protection:

      • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2000 V

      • CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 1000 V

    • Specified from -40 °C to +125 °C

    1+:¥3.4903

    100+:¥2.5954

    300+:¥2.1877

    10,000
    数据手册
    LSF0101
    LSF0101GXZ
    1-bit bidirectional multi-voltage level translator; open-drain; push-pull
    • Bidirectional voltage translation with no direction pin

    • Up translation

      • ≤ 100 MHz; CL = 30 pF

      • ≤ 50 MHz; CL = 50 pF

    • Down translation

      • ≥ 100 MHz; CL = 30 pF

      • ≥ 50 MHz; CL = 50 pF

    • Hot insertion

    • Bidirectional voltage level translation between:

      • 0.95 V and 1.8 V, 2.5 V, 3.3 V and 5.0 V

      • 1.2 V and 1.8 V, 2.5 V, 3.3 V and 5.0 V

      • 1.8 V and 2.5 V, 3.3 V and 5.0 V

      • 2.5 V and 3.3 V and 5.0 V

      • 3.3 V and 5.0 V

    • Low standby current

    • 5 V tolerant I/O pins to support TTL

    • Low RON provides less signal distortion

    • High-impedance I/O pins for EN = Low.

    • Flow-through pinout for easy PCB trace routing.

    • Latch-up performance exceeds 100 mA per JESD78 class II level A

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +125 °C

    1+:¥3.4705

    100+:¥2.5954

    300+:¥2.0385

    10,000
    数据手册
    74LVC162245A
    74LVCH162245ADGG:1
    16-bit transceiver with direction pin; 30 Ohm series termination resistors; 5 V tolerant input/output; 3-state
    • Overvoltage tolerant inputs to 5.5 V

    • Wide supply voltage range from 1.2 V to 3.6 V

    • CMOS low power consumption

    • Multibyte flow-through standard pin-out architecture

    • Low inductance multiple power and ground pins for minimum noise and ground bounce

    • Direct interface with TTL levels

    • Integrated 30 Ω termination resistors

    • IOFF circuitry provides partial Power-down mode operation

    • All data inputs have bus hold (74LVCH162245A only)

    • Complies with JEDEC standard:

      • JESD8-7A (1.65 V to 1.95 V)

      • JESD8-5A (2.3 V to 2.7 V)

      • JESD8-C/JESD36 (2.7 V to 3.6 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥5.5502

    100+:¥4.2277

    300+:¥3.3228

    10,000
    数据手册
    74LVC2G86
    74LVC2G86GXX
    Dual 2-input EXCLUSIVE-OR gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low-power dissipation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation
    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥3.3114

    100+:¥2.4959

    300+:¥2.4959

    10,000
    数据手册
    74LVC2G38
    74LVC2G38GXX
    Dual 2-input NAND gate; open drain
    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • ±24 mA output drive (VCC = 3.0 V)

    • Open-drain outputs

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥3.3909

    100+:¥2.5656

    300+:¥2.5656

    10,000
    数据手册
    74LVC2G08
    74LVC2G08GXX
    Dual 2-input AND gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • Overvoltage tolerant inputs to 5.5 V

    • IOFF circuitry provides partial Power-down mode operation

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥2.1305

    100+:¥1.2602

    300+:¥1.0648

    10,000
    数据手册
    74LVC2G00
    74LVC2G00GXX
    Dual 2-input NAND gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Overvoltage tolerant inputs to 5.5 V

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.8303

    100+:¥1.3771

    300+:¥1.9590

    10,000
    数据手册
    74LVC1GU04
    74LVC1GU04GX,125
    Unbuffered inverter
    • Overvoltage tolerant inputs to 5.5 V
    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • Complies with JEDEC standard no. 8-1A

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options
    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.7203

    100+:¥0.8810

    300+:¥0.8809

    10,000
    数据手册
    74LVC1G86
    74LVC1G86GX,125
    2-input EXCLUSIVE-OR gate
    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • Overvoltage tolerant inputs to 5.5 V

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • IOFF circuitry provides partial Power-down mode operation

    • Direct interface with TTL levels

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.1315

    100+:¥0.7398

    300+:¥0.6745

    10,000
    数据手册
    74LVC1G80
    74LVC1G80GX,125
    Single D-type flip-flop; positive-edge trigger
    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Latch-up performance exceeds 250 mA

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C.

    1+:¥3.2318

    100+:¥1.5278

    300+:¥1.5278

    10,000
    数据手册