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    HEF4528B
    HEF4528BT,653
    Dual monostable multivibrator

    • Fully static operation

    • Wide supply voltage range from 3.0 V to 15.0 V

    • CMOS low power dissipation

    • High noise immunity

    • 5 V, 10 V, and 15 V parametric ratings

    • Standardized symmetrical output characteristics

    • Complies with JEDEC standard JESD 13-B

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-B exceeds 200 V

    • Specified from -40 °C to +85 °C

    1+:¥4.2053

    100+:¥3.1657

    300+:¥2.6798

    15,000
    数据手册
    74LVC2G86
    74LVC2G86GT,115
    Dual 2-input EXCLUSIVE-OR gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low-power dissipation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥2.3521

    100+:¥1.2786

    300+:¥1.2786

    15,000
    数据手册
    74HC4094
    74HC4094PW,118
    8-stage shift-and-store bus register

    • Complies with JEDEC standard JESD7A

    • Input levels:

      • For 74HC4094: CMOS level

      • For 74HCT4094: TTL level

    • Low-power dissipation

    • ESD protection:

      • HBM JESD22-A114F exceeds 2 kV

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥2.8832

    100+:¥2.1826

    300+:¥1.8097

    15,000
    数据手册
    74HC165
    74HC165PW,118
    8-bit parallel-in/serial out shift register

    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Asynchronous 8-bit parallel load

    • Synchronous serial input

    • Input levels:

      • For 74HC165: CMOS level

      • For 74HCT165: TTL level

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥2.5668

    100+:¥1.9453

    300+:¥1.5950

    15,000
    数据手册
    74LVT245
    74LVT245D,118
    3.3 V octal transceiver with direction pin; 3-state

    • Wide supply voltage range from 2.7 to 3.6 V

    • 3-state buffers

    • Octal bidirectional bus interface

    • Overvoltage tolerant inputs to 5.5 V

    • Direct interface with TTL levels

    • BiCMOS high speed and output drive

    • Output capability: +64 mA/-32 mA

    • Latch-up protection exceeds 500 mA per JESD78 class II level A

    • Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs

    • No bus current loading when output is tied to 5 V bus

    • Live insertion/extraction permitted

    • Power-up 3-state

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standards JESD8C (2.7 V to 3.6 V)

    • ESD protection:

      • HBM JESD22-A114E exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to 85 °C

    1+:¥5.2901

    100+:¥4.0697

    300+:¥3.3917

    12,000
    数据手册
    74LVC162245A
    74LVCH162245ADGG:1
    16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state

    • Overvoltage tolerant inputs to 5.5 V

    • Wide supply voltage range from 1.2 V to 3.6 V

    • CMOS low power consumption

    • Multibyte flow-through standard pin-out architecture

    • Low inductance multiple power and ground pins for minimum noise and ground bounce

    • Direct interface with TTL levels

    • Integrated 30 Ω termination resistors

    • IOFF circuitry provides partial Power-down mode operation

    • All data inputs have bus hold (74LVCH162245A only)

    • Complies with JEDEC standard:

      • JESD8-7A (1.65 V to 1.95 V)

      • JESD8-5A (2.3 V to 2.7 V)

      • JESD8-C/JESD36 (2.7 V to 3.6 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥6.3071

    100+:¥4.8042

    300+:¥3.7759

    12,000
    数据手册
    74LVC1G34
    74LVC1G34GW,125
    Single buffer

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • IOFF circuitry provides partial Power-down mode operation

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥2.0018

    100+:¥1.0865

    300+:¥1.0865

    12,000
    数据手册
    74LVC2G86
    74LVC2G86GXX
    Dual 2-input EXCLUSIVE-OR gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low-power dissipation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥3.7629

    100+:¥2.8363

    300+:¥2.8363

    10,000
    数据手册
    74LVC2G38
    74LVC2G38GXX
    Dual 2-input NAND gate; open drain

    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • ±24 mA output drive (VCC = 3.0 V)

    • Open-drain outputs

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥3.8533

    100+:¥2.9154

    300+:¥2.9154

    10,000
    数据手册
    74LVC2G32
    74LVC2G32GXX
    Dual 2-input OR gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • 5 V tolerant outputs in the Power-down mode

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.6516

    100+:¥1.1125

    300+:¥1.1125

    10,000
    数据手册
    74LVC2G08
    74LVC2G08GXX
    Dual 2-input AND gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • Overvoltage tolerant inputs to 5.5 V

    • IOFF circuitry provides partial Power-down mode operation

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.6509

    100+:¥0.6509

    300+:¥0.6509

    10,000
    数据手册
    74LVC2G00
    74LVC2G00GXX
    Dual 2-input NAND gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Overvoltage tolerant inputs to 5.5 V

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥3.6047

    100+:¥2.7120

    300+:¥2.2261

    10,000
    数据手册
    74LVC1GU04
    74LVC1GU04GX,125
    Unbuffered inverter
    • Overvoltage tolerant inputs to 5.5 V

    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • Complies with JEDEC standard no. 8-1A

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.9549

    100+:¥1.0012

    300+:¥1.0012

    10,000
    数据手册
    74LVC1G86
    74LVC1G86GX,125
    2-input EXCLUSIVE-OR gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • Overvoltage tolerant inputs to 5.5 V

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • IOFF circuitry provides partial Power-down mode operation

    • Direct interface with TTL levels

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.1315

    100+:¥0.7398

    300+:¥0.6745

    10,000
    数据手册
    74LVC1G80
    74LVC1G80GX,125
    Single D-type flip-flop; positive-edge trigger

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Latch-up performance exceeds 250 mA

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C.

    1+:¥2.4860

    100+:¥1.1752

    300+:¥1.1752

    10,000
    数据手册
    74LVC1G79
    74LVC1G79GX,125
    Dual inverter

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • ±24 mA output drive (VCC = 3.0 V)

    • Direct interface with TTL levels

    • Latch-up performance exceeds 250 mA

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C.

    1+:¥1.1133

    100+:¥0.8687

    300+:¥0.6636

    10,000
    数据手册
    74LVC1G38
    74LVC1G38GX,125
    2-input NAND gate; open drain

    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power consumption

    • Open drain outputs

    • Direct interface with TTL levels

    • Inputs accept voltages up to 5 V

    • Latch-up performance exceeds 250 mA

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V).

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +125 °C.

    1+:¥2.3391

    100+:¥1.2656

    300+:¥1.2656

    10,000
    数据手册
    74LVC1G34
    74LVC1G34GX4Z
    Single buffer

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • IOFF circuitry provides partial Power-down mode operation

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥2.2600

    100+:¥1.2656

    300+:¥1.2656

    10,000
    数据手册
    74LVC1G32
    74LVC1G32GX,125
    Single 2-input OR gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C.

    1+:¥2.4860

    100+:¥1.1752

    300+:¥1.1752

    10,000
    数据手册
    74LVC1G240
    74LVC1G240GXH
    Single inverting buffer/line driver; 3-state

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥2.8589

    100+:¥1.9436

    300+:¥1.9436

    10,000
    数据手册