74LVC1G08GW,125

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74LVC1G08

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商品编号:
74LVC1G08GW,125
简述:
Single 2-input AND gate
描述:
The 74LVC1G08 is a single 2-input AND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time.
This device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
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Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
±24 mA output drive (V_CC = 3.0 V)
CMOS low power dissipation
Direct interface with TTL levels
Overvoltage tolerant inputs to 5.5 V
I_OFF circuitry provides partial Power-down mode operation
Latch-up performance ≤ 250 mA
Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C